1. 65‐nm CMOS low‐energy RNS modular multiplier for elliptic‐curve cryptography. Issue 2 (15th December 2017) Authors: Asif, Shahzad; Andersson, Oskar; Rodrigues, Joachim; Kong, Yinan Journal: IET computers & digital techniques Issue: Volume 12:Issue 2(2018) Page Start: 62 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
2. A case for three‐dimensional stacking of tightly coupled data memories over multi‐core clusters using low‐latency interconnects. Issue 5 (1st September 2013) Authors: Azarkhish, Erfan; Loi, Igor; Benini, Luca Journal: IET computers & digital techniques Issue: Volume 7:Issue 5(2013) Page Start: 191 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
3. A fault‐tolerant core mapping technique in networks‐on‐chip. Issue 6 (1st November 2013) Authors: Khalili, Fatemeh; Zarandi, Hamid R. Journal: IET computers & digital techniques Issue: Volume 7:Issue 6(2013) Page Start: 238 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
4. A four‐stage yield optimization technique for analog integrated circuits using optimal computing budget allocation and evolutionary algorithms. Issue 5 (9th October 2022) Authors: Yaseri, Abbas; Maghami, Mohammad Hossein; Radmehr, Mehdi Journal: IET computers & digital techniques Issue: Volume 16:Issue 5/6(2022) Page Start: 183 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
5. A New Squarer design with reduced area and delay. Issue 5 (1st September 2016) Authors: Banerjee, Arindam; Das, Debesh Kumar Journal: IET computers & digital techniques Issue: Volume 10:Issue 5(2016) Page Start: 205 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
6. A novel FPGA‐Based Bi input‐reduced order extended Kalman filter for speed‐sensorless direct torque control of induction motor with constant switching frequency controller. Issue 3 (10th March 2021) Authors: Inan, Remzi Journal: IET computers & digital techniques Issue: Volume 15:Issue 3(2021) Page Start: 185 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
7. A novel task scheduling approach for dependent non‐preemptive tasks using fuzzy logic. Issue 3 (15th March 2021) Authors: Hassan, Heba E.; Nagib, Gihan; Ibrahiem, Khaled Hosny Journal: IET computers & digital techniques Issue: Volume 15:Issue 3(2021) Page Start: 214 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
8. A radix‐8 modulo 2n multiplier using area and power‐optimized hard multiple generator. Issue 1 (13th December 2020) Authors: Kabra, Naveen Kr.; Patel, Zuber M. Journal: IET computers & digital techniques Issue: Volume 15:Issue 1(2021) Page Start: 36 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
9. A ROM‐less reverse RNS converter for moduli set {2q ± 1, 2q ± 3}. Issue 1 (1st January 2014) Authors: Jaberipur, Ghassem; Ahmadifar, HamidReza Journal: IET computers & digital techniques Issue: Volume 8:Issue 1(2014) Page Start: 11 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
10. A universal method for designing low‐power carbon nanotube FET‐based multiple‐valued logic circuits. Issue 4 (1st July 2013) Authors: Moaiyeri, Mohammad Hossein; Mirzaee, Reza Faghih; Doostaregan, Akbar; Navi, Keivan; Hashemipour, Omid Journal: IET computers & digital techniques Issue: Volume 7:Issue 4(2013) Page Start: 167 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗