1. (Invited) Evaluation of Stacked Nanowires Transistors for CMOS: Performance and Technology Opportunities. (4th May 2016) Authors: Gaben, Loïc; Barraud, Sylvain; Samson, Marie-Pierre; Jaud, Marie-Anne; Martinie, Sébastien; Rozeau, Olivier; Lacord, Joris; Arvet, Christian; Vizioz, Christian; Bustos, Jessy; Dallery, Jacques-Alexandre; Pauliac, Sébastien; Balan, Viorel; Euvrard-Colnat, Catherine; Perrot, Cédric; Loup, Virginie;... Journal: ECS transactions Issue: Volume 72:Number 4(2016) Page Start: 43 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
2. (Invited) Germanium Enrichment for Planar-, Fin- and Nanowire-Channel MOSFETs Made on SOI. (18th August 2016) Authors: Augendre, Emmanuel; Loubet, Nicolas; Morin, Pierre Francois; Liu, Qing; Schmitt, Joël; L'Herron, Benoît; Nguyen, Phuong; Barraud, Sylvain; Hutin, Louis; Maitrejean, Sylvain; De Salvo, Barbara; Coquand, Rémi; Reboh, Shay; Venigalla, Rajasekhar; Doris, Bruce; Yamashita, Tenko; Faynot, Olivier; Vine... Journal: ECS transactions Issue: Volume 75:Number 8(2016) Page Start: 505 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
3. (Invited)3D Monolithic Integration. (10th April 2018) Authors: Brunet, Laurent; Batude, Perrine; Fenouillet-Beranger, Claire; Vinet, Maud Journal: ECS transactions Issue: Volume 85:Number 8(2018) Page Start: 125 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
4. A review of the mechanical stressors efficiency applied to the ultra-thin body & buried oxide fully depleted silicon on insulator technology. (March 2016) Authors: Morin, Pierre; Maitrejean, Sylvain; Allibert, Frederic; Augendre, Emmanuel; Liu, Qing; Loubet, Nicolas; Grenouillet, Laurent; Pofelski, Alexandre; Chen, Kangguo; Khakifirooz, Ali; Wacquez, Romain; Reboh, Shay; Bonnevialle, Aurore; le Royer, Cyrille; Morand, Yves; Kanyandekwe, Joel; Chanemougamme,... Journal: Solid-state electronics Issue: Volume 117(2016) Page Start: 100 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
5. A review of the mechanical stressors efficiency applied to the ultra-thin body & buried oxide fully depleted silicon on insulator technology. (March 2016) Authors: Morin, Pierre; Maitrejean, Sylvain; Allibert, Frederic; Augendre, Emmanuel; Liu, Qing; Loubet, Nicolas; Grenouillet, Laurent; Pofelski, Alexandre; Chen, Kangguo; Khakifirooz, Ali; Wacquez, Romain; Reboh, Shay; Bonnevialle, Aurore; le Royer, Cyrille; Morand, Yves; Kanyandekwe, Joel; Chanemougamme,... Journal: Solid-state electronics Issue: Volume 117(2016) Page Start: 100 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
6. Analog characteristics of n-type vertically stacked nanowires. (November 2021) Authors: Mariniello, Genaro; Carvalho, Cesar Augusto Belchior de; Cardoso Paz, Bruna; Barraud, Sylvain; Vinet, Maud; Faynot, Olivier; Antonio Pavanello, Marcelo Journal: Solid-state electronics Issue: Volume 185(2021) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
7. Charge Pumping in Ultrathin SOI Tunnel FETs: Impact of Back-Gate Voltage. (23rd April 2019) Authors: Diaz Llorente, Carlos; G. Theodorou, Christoforos; Colinge, Jean-Pierre; Cristoloveanu, Sorin; Martinie, Sebastien; Le Royer, Cyrille; Ghibaudo, Gerard; Vinet, Maud Journal: ECS transactions Issue: Volume 89:Number 3(2019) Page Start: 111 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
8. Demonstration of Single Hole Transistor and Hybrid Circuits for Multivalued Logic and Memory Applications up to 350 K Using CMOS Silicon Nanowires. (8th February 2016) Authors: Lavieville, Romain; Barraud, Sylvain; Arvet, Christian; Vizioz, Christian; Corna, Andrea; Jehl, Xavier; Sanquer, Marc; Vinet, Maud Journal: Advanced Electronic Materials Issue: Volume 2:Number 4(2016) Page Start: n/a Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
9. Electrical characteristics of n-type vertically stacked nanowires operating up to 600 K. (August 2022) Authors: Mariniello, Genaro; Barraud, Sylvain; Vinet, Maud; Cassé, Mikael; Faynot, Olivier; Calcade, Jaime; Antonio Pavanello, Marcelo Journal: Solid-state electronics Issue: Volume 194(2022) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
10. Electrical characterization of stacked SOI nanowires at low temperatures. (May 2022) Authors: Rodrigues, Jaime C.; Mariniello, Genaro; Cassé, Mikael; Barraud, Sylvain; Vinet, Maud; Faynot, Olivier; Pavanello, Marcelo A. Journal: Solid-state electronics Issue: Volume 191(2022) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗