A review of the mechanical stressors efficiency applied to the ultra-thin body & buried oxide fully depleted silicon on insulator technology. (March 2016)
- Record Type:
- Journal Article
- Title:
- A review of the mechanical stressors efficiency applied to the ultra-thin body & buried oxide fully depleted silicon on insulator technology. (March 2016)
- Main Title:
- A review of the mechanical stressors efficiency applied to the ultra-thin body & buried oxide fully depleted silicon on insulator technology
- Authors:
- Morin, Pierre
Maitrejean, Sylvain
Allibert, Frederic
Augendre, Emmanuel
Liu, Qing
Loubet, Nicolas
Grenouillet, Laurent
Pofelski, Alexandre
Chen, Kangguo
Khakifirooz, Ali
Wacquez, Romain
Reboh, Shay
Bonnevialle, Aurore
le Royer, Cyrille
Morand, Yves
Kanyandekwe, Joel
Chanemougamme, Daniel
Mignot, Yann
Escarabajal, Yann
Lherron, Benoit
Chafik, Fadoua
Pilorget, Sonia
Caubet, Pierre
Vinet, Maud
Clement, Laurent
Desalvo, Barbara
Doris, Bruce
Kleemeier, Walter - Abstract:
- Abstract: This paper reviews the different stressor techniques used in microelectronics, in the scope of the Ultra-Thin Body & Buried Oxide Fully-Depleted Silicon On Insulator technology (UTBB FD-SOI). We compare the mechanical efficiency of the various stressors and present the impact of device dimensions (active area, gate length and pitch) on their efficiency. Our study emphasizes the high efficiency, for the FD-SOI technology, of the intrinsically strained channels, compared to the traditional embedded raised source/drain and contact-etch stop liner. With these techniques FD-SOI technology has already demonstrated channel stress higher than 1.5 GPa for n type transistor and −2.3 GPa for the p type devices and we envision channel stress values up to ±3 GPa for n and p transistor channel, respectively. This performance is partly due to the mechanical configuration of intrinsically strained channels, in parallel mode rather than in serial mode as for the previous generation of stressors, which makes them less sensitive to the scaling of the contacted gate pitch. We also highlight another key element the high mechanical stability of the UTBB technology, related to the limited channel thickness (around 6 nm) which enables achieving highly stressed channel without substantial adaptation of the integration flows.
- Is Part Of:
- Solid-state electronics. Volume 117(2016)
- Journal:
- Solid-state electronics
- Issue:
- Volume 117(2016)
- Issue Display:
- Volume 117, Issue 2016 (2016)
- Year:
- 2016
- Volume:
- 117
- Issue:
- 2016
- Issue Sort Value:
- 2016-0117-2016-0000
- Page Start:
- 100
- Page End:
- 116
- Publication Date:
- 2016-03
- Subjects:
- Semiconductors -- Periodicals
Semiconducteurs -- Périodiques
621.38152 - Journal URLs:
- http://www.sciencedirect.com/science/journal/00381101 ↗
http://www.elsevier.com/journals ↗ - DOI:
- 10.1016/j.sse.2015.11.024 ↗
- Languages:
- English
- ISSNs:
- 0038-1101
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 8327.385000
British Library DSC - BLDSS-3PM
British Library HMNTS - ELD Digital store - Ingest File:
- 1573.xml