Cite
MLA Citation
Nuno Lourenço et al.. Automatic analog IC sizing and optimization constrained with PVT corners and layout effects. Switzerland : Springer, 2016. http://access.bl.uk/ark:/81055/vdc_100071524023.0x000001
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Nuno Lourenço et al.. Automatic analog IC sizing and optimization constrained with PVT corners and layout effects. Switzerland : Springer, 2016. http://access.bl.uk/ark:/81055/vdc_100071524023.0x000001