891. Design of low phase noise CMOS VCO using cross coupled topology with capacitor feedback. (August 2016) Authors: Hsu, Meng-Ting; Li, Wei-Jhih; Hsu, Shuo-Chang Journal: Microelectronics journal Issue: Volume 54(2016) Page Start: 32 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
892. Design of low phase-noise oscillators based on microstrip triple-band bandpass filter using coupled lines resonator. (January 2019) Authors: Khamin-Hamedani, Farnaz; Karimi, Gholamreza Journal: Microelectronics journal Issue: Volume 83(2019) Page Start: 18 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
893. Design of low power and high read stability 8T-SRAM memory based on the modified Gate Diffusion Input (m-GDI) in 32 nm CNTFET technology. Issue 12 (December 2015) Authors: Abiri, Ebrahim; Darabi, Abdolreza Journal: Microelectronics journal Issue: Volume 46:Issue 12 Part A (2015) Page Start: 1351 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
894. Design of low power comparator-reduced hybrid ADC. (September 2018) Authors: Molaei, Hasan; Hajsadeghi, Khosrow; Khorami, Ata Journal: Microelectronics journal Issue: Volume 79(2018) Page Start: 79 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
895. Design of low power fault tolerant flash ADC for instrumentation applications. (April 2020) Authors: Prathiba, G.; Santhi, M. Journal: Microelectronics journal Issue: Volume 98(2020) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
896. Design of low power Teager Energy Operator circuit for Sleep Spindle and K-Complex extraction. (June 2020) Authors: Khan, Sumaiyah I.; Diab, Maha S.; Mahmoud, Soliman A. Journal: Microelectronics journal Issue: Volume 100(2020) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
897. Design of low-voltage shallow-depth differential source coupled logic using feedback and feedforward techniques. (April 2019) Authors: Rafiee, M.; Ghaznavi-Ghoushchi, M.B. Journal: Microelectronics journal Issue: Volume 86(2019) Page Start: 140 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
898. Design of M-tree Adder using majority logic for removal of artifacts in bio signal. (May 2022) Authors: Aathilakshmi, S.; Vimala, R.; Britto, K.R. Aravind Journal: Microelectronics journal Issue: Volume 123(2022) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
899. Design of MNU-Resilient latches based on input-split C-elements. (October 2021) Authors: Huang, Zhengfeng; Li, Xiandong; Gong, Zhouyu; Liang, Huaguo; Lu, Yingchun; Ouyang, Yiming; Ni, Tianming Journal: Microelectronics journal Issue: Volume 116(2021) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
900. Design of MTJ-Based nonvolatile logic gates for quantized neural networks. (December 2018) Authors: Natsui, Masanori; Chiba, Tomoki; Hanyu, Takahiro Journal: Microelectronics journal Issue: Volume 82(2018) Page Start: 13 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗