Design of MNU-Resilient latches based on input-split C-elements. (October 2021)

• Record Type: Journal Article
• Authors: Huang, Zhengfeng; Li, Xiandong; Gong, Zhouyu; Liang, Huaguo; Lu, Yingchun; Ouyang, Yiming; Ni, Tianming
• Is Part Of: Microelectronics journal. Volume 116(2021)
• Publication Date: 2021-10
• Subjects: Circuit reliability -- Radiation hardened by design -- Multiple-node-upset -- Resilience; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2021.105243
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: With the continuous scaling of feature sizes, latches are becoming more and more sensitive to the multiple-node upsets (MNUs) induced by radiation. Based on input-split C-elements and a redundant feedback scheme, we propose a triple-node-upset-resilient latch (ISC-TRL) and a quadruple-node-upset-resilient latch (ISC-QRL) to provide high reliability. Using the novel interconnection scheme between the four-level input-split C-elements, any possible triple-node upset (TNU) or quadruple-node upset (QNU) occurred in the proposed latches can be filtered level by level, respectively. HSPICE simulation performed in 14 nm FinFET technology show that, compared with relevant MNU-hardened latches, the proposed ISC-TRL latch can reduce the delay-power-area product (DPAP) by 89.81% and only introduces 3.85% area overhead on average, while achieving 100% TNU-resilience and 99% QNU-resilience. The proposed ISC-QRL latch can reduce the DPAP by 83.01% and introduce 38.46% area overhead on average, while achieving 100% QNU-resilience. In addition, Monte Carlo simulation results show that the proposed ISC-TRL and ISC-QRL latches are of low sensitivity to process, voltage and temperature (PVT) variations.