1. A multi‐variable double impedance matching network design algorithm with design example of a low noise amplifier. Issue 12 (11th October 2022) Authors: Bajpai, Neha; Chauhan, Yogesh Singh Journal: International journal of RF and microwave computer-aided engineering Issue: Volume 32:Issue 12(2022) Page Start: n/a Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
2. Addressing source to drain tunneling in extremely scaled Si-transistors using negative capacitance. (December 2021) Authors: Pandey, Nilesh; Pahwa, Girish; Chauhan, Yogesh Singh Journal: Solid-state electronics Issue: Volume 186(2021) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
3. Analysis and modeling of anomalous flicker noise in long channel halo MOSFETs. (August 2021) Authors: Goel, Ravi; Gupta, Chetan; Skalsky, Milos; Chauhan, Yogesh Singh Journal: Solid-state electronics Issue: Volume 181/182(2021) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
4. Analysis and modeling of flicker noise in lateral asymmetric channel MOSFETs. (January 2016) Authors: Agarwal, Harshit; Kushwaha, Pragya; Gupta, Chetan; Khandelwal, Sourabh; Hu, Chenming; Chauhan, Yogesh Singh Journal: Solid-state electronics Issue: Volume 115 Part A(2016) Page Start: 33 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
5. Analysis and modeling of zero-threshold voltage native devices with industry standard BSIM6 model. (7th March 2017) Authors: Gupta, Chetan; Agarwal, Harshit; Lin, Y. K.; Ito, Akira; Hu, Chenming; Chauhan, Yogesh Singh Journal: Japanese journal of applied physics Issue: Volume 56:Number 4(2017)Supplement Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
6. Analytical approximation of surface potential and analysis of C–V characteristics of bulk MOSFETs at cryogenic temperatures. (November 2022) Authors: Manzoor, Wajid; Dutta, Aloke K.; Chauhan, Yogesh Singh Journal: Microelectronics journal Issue: Volume 129(2022) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
7. Associative processing using negative capacitance FDSOI transistor for pattern recognition. (October 2020) Authors: Rajasekharan, Dinesh; Kushwaha, Pragya; Chauhan, Yogesh Singh Journal: Microelectronics journal Issue: Volume 104(2020) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
8. Atomistic study of band structure and transport in extremely thin channel InP MOSFETs. Issue 4 (29th February 2016) Authors: Dutta, Tapas; Kumar, Piyush; Rastogi, Priyank; Agarwal, Amit; Chauhan, Yogesh Singh Journal: Physica status solidi Issue: Volume 213:Issue 4(2016:Apr.) Page Start: 898 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
9. BSIM-bulk MOSFET model for IC design : digital, analog, RF and high-voltage /: digital, analog, RF and high-voltage. (2023) Authors: Hu, Chenming; Agarwal, Harshit; Gupta, Chetna; Chauhan, Yogesh Singh Record Type: Book Extent: 1 online resource (246 pages), illustrations (black and white, and colour) View Content: Available online (eLD content is only available in our Reading Rooms) ↗
10. Characterization and modeling of drain lag using a modified RC network in the ASM-HEMT framework. (January 2023) Authors: Nazir, Mohammad Sajid; Pampori, Ahtisham; Dangi, Raghvendra; Kushwaha, Pragya; Yadav, Ekta; Sinha, Santanu; Chauhan, Yogesh Singh Journal: Solid-state electronics Issue: Volume 199(2023) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗