Analysis and modeling of anomalous flicker noise in long channel halo MOSFETs. (August 2021)

• Record Type: Journal Article
• Authors: Goel, Ravi; Gupta, Chetan; Skalsky, Milos; Chauhan, Yogesh Singh
• Is Part Of: Solid-state electronics. Volume 181/182(2021)
• Publication Date: 2021-08
• Subjects: Flicker noise -- Halo -- Low frequency noise -- TCAD -- Compact model; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2021.108028
• Languages: English
• ISSNs: 0038-1101

Abstract

Highlights: Drain current power spectral density (SID) of flicker noise (1/f) exhibits nonmonotonic trends with the drain bias. Drain-side halo doped causes this anomalous behaviour of 1/f noise. A three-transistor based sub-circuit model captures 1/f in all the regions (from subthreshold to strong inversion). In sub-circuit, total SID is the superposition of SID of individual transistor weighted by the contribution factor. Abstract: Halo implanted MOSFETs exhibit anomalous behavior in drain current power spectral density ( S ID ) of flicker noise (1/f) with the variation in drain voltage, but this behavior cannot be captured by existing 1/f models. To identify the reasons for this abnormal behavior of 1/f noise, we have performed experimentally calibrated technology computer-aided design (TCAD) simulations. We find that this anomalous behavior comes from the drain-side halo region, and it has complex dependence on the bias and geometry. We propose a sub-circuit model for 1 / f noise that successfully captures the anomalous behavior of S ID with the drain bias. This model calculates the individual contributions and the impact of different device regions, such as the source side halo, channel, and drain side halo, on the overall noise of the device. The proposed model is in good agreement with the experimentally calibrated TCAD simulations for different geometries, biases, and temperatures. The proposed model is also validated with the measurement data.