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7. Extraction and modeling of layout-dependent MOSFET gate-to-source/drain fringing capacitance in 40 nm technology. (September 2015)

8. Extraction and modeling of layout-dependent MOSFET gate-to-source/drain fringing capacitance in 40 nm technology. (September 2015)

10. Highly Aligned Graphene/Polymer Nanocomposites with Excellent Dielectric Properties for High‐Performance Electromagnetic Interference Shielding. (8th April 2014)