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APA Citation
Tripathy, M. R., Singh, A. K., Samad, A., Singh, P. K., Baral, K., & Jit, S. (2020). impact of heterogeneous gate dielectric on DC, RF and circuit-level performance of source-pocket engineered Ge/Si heterojunction vertical TFET. Semiconductor science and technology, 35, . http://access.bl.uk/ark:/81055/vdc_100110165600.0x000056