Cite
MLA Citation
Erik Seligman et al.. Formal verification : an essential toolkit for modern VLSI design. Amsterdam : Morgan Kaufmann, 2015. http://access.bl.uk/ark:/81055/vdc_100026049154.0x000001
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Erik Seligman et al.. Formal verification : an essential toolkit for modern VLSI design. Amsterdam : Morgan Kaufmann, 2015. http://access.bl.uk/ark:/81055/vdc_100026049154.0x000001