Cite
HARVARD Citation
Seligman, E. et al. (2015) Formal verification : an essential toolkit for modern VLSI design. [Online]. Amsterdam : Morgan Kaufmann. Available from: http://access.bl.uk/ark:/81055/vdc_100026049154.0x000001
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Seligman, E. et al. (2015) Formal verification : an essential toolkit for modern VLSI design. [Online]. Amsterdam : Morgan Kaufmann. Available from: http://access.bl.uk/ark:/81055/vdc_100026049154.0x000001