Cite
APA Citation
Seligman, E., Schubert, E. T., & Kumar, M. V. A. K. (2015). Formal verification : an essential toolkit for modern VLSI design. Amsterdam : Morgan Kaufmann. http://access.bl.uk/ark:/81055/vdc_100026049154.0x000001
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Seligman, E., Schubert, E. T., & Kumar, M. V. A. K. (2015). Formal verification : an essential toolkit for modern VLSI design. Amsterdam : Morgan Kaufmann. http://access.bl.uk/ark:/81055/vdc_100026049154.0x000001