1. A low specific on-resistance power trench MOSFET with a buried-interface-drain. (September 2015) Authors: Hu, Shengdong; Chen, Yinhui; Jin, Jingjing; Zhou, Jianlin; Zhou, Feng; Chen, Zongze; Huang, Ye; Luo, Jun; Wang, Jian'an Journal: Superlattices and microstructures Issue: Volume 85(2015) Page Start: 133 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
2. A low specific on-resistance power trench MOSFET with a buried-interface-drain. (September 2015) Authors: Hu, Shengdong; Chen, Yinhui; Jin, Jingjing; Zhou, Jianlin; Zhou, Feng; Chen, Zongze; Huang, Ye; Luo, Jun; Wang, Jian'an Journal: Superlattices and microstructures Issue: Volume 85(2015) Page Start: 133 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
3. A novel low specific on-resistance double-gate LDMOS with multiple buried p-layers in the drift region based on the Silicon-On-Insulator substrate. (January 2016) Authors: Chen, Yinhui; Hu, Shengdong; Cheng, Kun; Jiang, YuYu; Luo, Jun; Wang, Jian'an; Tang, Fang; Zhou, Xichuan; Zhou, Jianlin; Gan, Ping Journal: Superlattices and microstructures Issue: Volume 89(2016) Page Start: 59 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
4. A novel trench SOI LDMOS with a dual floating vertical field plate. (September 2017) Authors: Cheng, Kun; Hu, Shengdong; Lei, Jianmei; Yuan, Qi; Jiang, Yuyu; Huang, Ye; Yang, Dong; Lin, Zhi; Zhou, Xichuan; Tang, Fang Journal: Superlattices and microstructures Issue: Volume 109(2017) Page Start: 134 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
5. An ultra-low specific on-resistance double-gate trench SOI LDMOS with P/N pillars. (December 2017) Authors: Yang, Dong; Hu, Shengdong; Lei, Jianmei; Huang, Ye; Yuan, Qi; Jiang, Yuyu; Guo, Jingwei; Cheng, Kun; Lin, Zhi; Zhou, Xichuan; Tang, Fang Journal: Superlattices and microstructures Issue: Volume 112(2017) Page Start: 269 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
6. Effective performance improvement based on dioctylbenzothienobenzothiophene/pentacene isotype organic heterojunction transistors. (9th April 2019) Authors: Ni, Yao; Zhou, Jianlin; Hao, Yuanyuan; Yu, Hang; Wang, Yang; Gan, Ping; Hu, Shengdong Journal: Semiconductor science and technology Issue: Volume 34:Number 5(2019) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
7. Improved SOI LDMOS performance by using a partial stepped polysilicon layer as the buried layer. (February 2019) Authors: Guo, Jingwei; Hu, Shengdong; Huang, Ye; Yuan, Qi; Yang, Dong; Yang, Ling; You, Liang; Yu, Jianyi Journal: Materials science in semiconductor processing Issue: Volume 90(2019) Page Start: 7 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
8. Improving breakdown, conductive, and thermal performances for SOI high voltage LDMOS using a partial compound buried layer. (March 2016) Authors: Hu, Shengdong; Luo, Jun; Jiang, YuYu; Cheng, Kun; Chen, Yinhui; Jin, Jingjing; Wang, Jian'an; Zhou, Jianlin; Tang, Fang; Zhou, Xichuan; Gan, Ping Journal: Solid-state electronics Issue: Volume 117(2016) Page Start: 146 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
9. Improving breakdown, conductive, and thermal performances for SOI high voltage LDMOS using a partial compound buried layer. (March 2016) Authors: Hu, Shengdong; Luo, Jun; Jiang, YuYu; Cheng, Kun; Chen, Yinhui; Jin, Jingjing; Wang, Jian'an; Zhou, Jianlin; Tang, Fang; Zhou, Xichuan; Gan, Ping Journal: Solid-state electronics Issue: Volume 117(2016) Page Start: 146 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
10. Investigation of performance enhancement in InAs/InGaAs heterojunction-enhanced N-channel tunneling field-effect transistor. (December 2015) Authors: Han, Genquan; Zhao, Bin; Liu, Yan; Wang, Hongjuan; Liu, Mingshan; Zhang, Chunfu; Hu, Shengdong; Hao, Yue Journal: Superlattices and microstructures Issue: Volume 88(2015) Page Start: 90 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗