An ultra-low specific on-resistance double-gate trench SOI LDMOS with P/N pillars. (December 2017)
- Record Type:
- Journal Article
- Title:
- An ultra-low specific on-resistance double-gate trench SOI LDMOS with P/N pillars. (December 2017)
- Main Title:
- An ultra-low specific on-resistance double-gate trench SOI LDMOS with P/N pillars
- Authors:
- Yang, Dong
Hu, Shengdong
Lei, Jianmei
Huang, Ye
Yuan, Qi
Jiang, Yuyu
Guo, Jingwei
Cheng, Kun
Lin, Zhi
Zhou, Xichuan
Tang, Fang - Abstract:
- Abstract: A novel ultra-low specific on-resistance ( R on, sp ) trench lateral double-diffused MOSFET with P/N pillars and dual trench gates (P/N DTG-T LDMOS) based on silicon-on-insulator technology is proposed in this paper. The new structure features dual trench gates and heavily doping P/N pillars. The P/N pillars are inserted into the drift region under the P-well. The P-pillar causes an assistant depletion effect on the drift region. The N-pillar can not only improve the breakdown voltage (BV) by modulating the electric field but also significantly reduce the R on, sp by increasing the doping concentration of the drift region. Furthermore, the dual trench gates form dual conduction channels and the heavily doping N-pillar provides a lower resistance region for the carriers, which can both reduce the R on, sp . Consequently, compared with the conventional trench LDMOS, a lower R on, sp of 0.58 mΩ cm 2 and a higher the figure of merit (FOM, FOM=BV 2 / R on, sp ) of 62.9 MW/cm 2 are obtained for the P/N DTG-T LDMOS, which are improved by 74.8% and 308.4% respectively. Meanwhile, the BVs of the both structures are maintained at a same level of 190 V. Highlights: An ultra-low specific on-resistance double-gate trench SOI LDMOS is proposed. The influences of structure parameters on the performances are investigated. A R on, sp of 0.58 mΩ cm 2 and a figure-of-merit of 62.9 MW/cm 2 are obtained. Figure-of-merit of the proposed structure is enhanced by 308.4%. A significantlyAbstract: A novel ultra-low specific on-resistance ( R on, sp ) trench lateral double-diffused MOSFET with P/N pillars and dual trench gates (P/N DTG-T LDMOS) based on silicon-on-insulator technology is proposed in this paper. The new structure features dual trench gates and heavily doping P/N pillars. The P/N pillars are inserted into the drift region under the P-well. The P-pillar causes an assistant depletion effect on the drift region. The N-pillar can not only improve the breakdown voltage (BV) by modulating the electric field but also significantly reduce the R on, sp by increasing the doping concentration of the drift region. Furthermore, the dual trench gates form dual conduction channels and the heavily doping N-pillar provides a lower resistance region for the carriers, which can both reduce the R on, sp . Consequently, compared with the conventional trench LDMOS, a lower R on, sp of 0.58 mΩ cm 2 and a higher the figure of merit (FOM, FOM=BV 2 / R on, sp ) of 62.9 MW/cm 2 are obtained for the P/N DTG-T LDMOS, which are improved by 74.8% and 308.4% respectively. Meanwhile, the BVs of the both structures are maintained at a same level of 190 V. Highlights: An ultra-low specific on-resistance double-gate trench SOI LDMOS is proposed. The influences of structure parameters on the performances are investigated. A R on, sp of 0.58 mΩ cm 2 and a figure-of-merit of 62.9 MW/cm 2 are obtained. Figure-of-merit of the proposed structure is enhanced by 308.4%. A significantly optimized dependence of R on, sp on BV is obtained. … (more)
- Is Part Of:
- Superlattices and microstructures. Volume 112(2017)
- Journal:
- Superlattices and microstructures
- Issue:
- Volume 112(2017)
- Issue Display:
- Volume 112, Issue 2017 (2017)
- Year:
- 2017
- Volume:
- 112
- Issue:
- 2017
- Issue Sort Value:
- 2017-0112-2017-0000
- Page Start:
- 269
- Page End:
- 278
- Publication Date:
- 2017-12
- Subjects:
- LDMOS -- Trench -- Pillar -- Breakdown voltage (BV) -- Specific on-resistance
Superlattices as materials -- Periodicals
Microstructure -- Periodicals
Semiconductors -- Periodicals
Superréseaux -- Périodiques
Microstructure (Physique) -- Périodiques
Semiconducteurs -- Périodiques
621.38152 - Journal URLs:
- http://www.sciencedirect.com/science/journal/07496036 ↗
http://www.elsevier.com/journals ↗ - DOI:
- 10.1016/j.spmi.2017.09.033 ↗
- Languages:
- English
- ISSNs:
- 0749-6036
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 8547.076700
British Library DSC - BLDSS-3PM
British Library HMNTS - ELD Digital store - Ingest File:
- 5326.xml