1. Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits. (February 2017) Authors: Strangio, S.; Palestri, P.; Lanuzza, M.; Esseni, D.; Crupi, F.; Selmi, L. Journal: Solid-state electronics Issue: Volume 128(2017) Page Start: 37 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
2. Correction: Stabilization of negative capacitance in ferroelectric capacitors with and without a metal interlayer. Issue 22 (2nd June 2020) Authors: Rollo, T.; Blanchini, F.; Giordano, G.; Specogna, R.; Esseni, D. Journal: Nanoscale Issue: Volume 12:Issue 22(2020) Page Start: 12177 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
3. Digital and analog TFET circuits: Design and benchmark. (August 2018) Authors: Strangio, S.; Settino, F.; Palestri, P.; Lanuzza, M.; Crupi, F.; Esseni, D.; Selmi, L. Journal: Solid-state electronics Issue: Volume 146(2018) Page Start: 50 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
4. Engineering of metal-MoS2 contacts to overcome Fermi level pinning. (August 2022) Authors: Khakbaz, P.; Driussi, F.; Giannozzi, P.; Gambi, A.; Lizzit, D.; Esseni, D. Journal: Solid-state electronics Issue: Volume 194(2022) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
5. Modeling and optimization of graphene ballistic rectifiers. (August 2022) Authors: Truccolo, D.; Boscolo, S.; Esseni, D.; Midrio, M.; Palestri, P. Journal: Solid-state electronics Issue: Volume 194(2022) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
6. On the interpretation of MOS impedance data in both series and parallel circuit topologies. (November 2021) Authors: Caruso, E.; Lin, J.; Monaghan, S.; Cherkaoui, K.; Floyd, L.; Gity, F.; Palestri, P.; Esseni, D.; Selmi, L.; Hurley, P.K. Journal: Solid-state electronics Issue: Volume 185(2021) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
7. Optimization of GaAs/AlGaAs staircase avalanche photodiodes accounting for both electron and hole impact ionization. (June 2020) Authors: Pilotto, A.; Nichetti, C.; Palestri, P.; Selmi, L.; Antonelli, M.; Arfelli, F.; Biasiol, G.; Cautero, G.; Driussi, F.; Esseni, D.; Menk, R.H.; Steinhartova, T. Journal: Solid-state electronics Issue: Volume 168(2020) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
8. Semi-classical transport in MoS2 and MoS2 transistors by a Monte Carlo approach. (June 2022) Authors: Pilotto, A.; Khakbaz, P.; Palestri, P.; Esseni, D. Journal: Solid-state electronics Issue: Volume 192(2022) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
9. Simulation study of Fermi level depinning in metal-MoS2 contacts. (October 2021) Authors: Khakbaz, P.; Driussi, F.; Giannozzi, P.; Gambi, A.; Esseni, D. Journal: Solid-state electronics Issue: Volume 184(2021) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
10. Stabilization of negative capacitance in ferroelectric capacitors with and without a metal interlayer. Issue 10 (4th March 2020) Authors: Rollo, T.; Blanchini, F.; Giordano, G.; Specogna, R.; Esseni, D. Journal: Nanoscale Issue: Volume 12:Issue 10(2020) Page Start: 6121 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗