Cite
APA Citation
Lai, M., Zhang, G., Lv, F., Zheng, X., Wang, H., Lv, D., Xu, C., & Qi, X. (2022). a 33.33 Gb/s/wire pin-efficient 1.06 pJ/bit wireline transceiver based on CNRZ-5 for Chiplet in 28 nm CMOS. Microelectronics journal, 130, . http://access.bl.uk/ark:/81055/vdc_100170104441.0x00005c