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HARVARD Citation
Lai, M. et al. (2022). A 33.33 Gb/s/wire pin-efficient 1.06 pJ/bit wireline transceiver based on CNRZ-5 for Chiplet in 28 nm CMOS. Microelectronics journal. p. . [Online].
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Lai, M. et al. (2022). A 33.33 Gb/s/wire pin-efficient 1.06 pJ/bit wireline transceiver based on CNRZ-5 for Chiplet in 28 nm CMOS. Microelectronics journal. p. . [Online].