Cite
MLA Citation
Siva Ramakrishna Pillutla and Lakshmi Boppana. “Low-latency area-efficient systolic bit-parallel GF(2m) multiplier for a narrow class of trinomials.” Microelectronics journal, vol. 117, 2021, p. . http://access.bl.uk/ark:/81055/vdc_100145481718.0x00005a