Failure analysis of ESD-stressed SiC MESFET. Issue 9 (August 2015)

• Record Type: Journal Article
• Authors: Phulpin, T.; Trémouilles, D.; Isoird, K.; Tournier, D.; Godignon, P.; Austin, P.
• Is Part Of: Microelectronics and reliability. Volume 55:Issue 9/10(2015)
• Page Start: 1542
• Page End: 1548
• Publication Date: 2015-08
• Subjects: SiC MESFET -- ESD reliability -- Zener -- TLP dielectric parasitic; Electronic apparatus and appliances -- Reliability -- Periodicals; Miniature electronic equipment -- Periodicals; Appareils électroniques -- Fiabilité -- Périodiques; Équipement électronique miniaturisé -- Périodiques; Electronic apparatus and appliances -- Reliability; Miniature electronic equipment; Periodicals; 621.3815
• DOI: 10.1016/j.microrel.2015.06.121
• Languages: English
• ISSNs: 0026-2714

Abstract

Abstract: Reliability studies are required for SiC device development. In a previous work we studied the intrinsic ESD robustness of a SiC MESFET. The failure mechanism was related to the triggering of an NPN parasitic transistor. In this work, a new MESFET layout is considered, which optionally include a Zener diode for internal protection. TLP testing and failure analysis has been carried out. Two new failure mechanisms are evidenced. Based on this knowledge, solutions are proposed to further improve the ESD robustness.