The improvement of atomic layer deposited SiO2/4H-SiC interfaces via a high temperature forming gas anneal. (February 2021)

• Record Type: Journal Article
• Authors: Renz, A.B.; Vavasour, O.J.; Gammon, P.M.; Li, F.; Dai, T.; Antoniou, M.; Baker, G.W.C.; Bashar, E.; Grant, N.E.; Murphy, J.D.; Mawby, P.A.; Shah, V.A.
• Is Part Of: Materials science in semiconductor processing. Volume 122(2021)
• Publication Date: 2021-02
• Subjects: 4H-siC -- SiO2/4H-siC interface -- Atomic layer deposition -- Forming gas anneal; Semiconductors -- Periodicals; Integrated circuits -- Materials -- Periodicals; Semiconducteurs -- Périodiques; Circuits intégrés -- Matériaux -- Périodiques; Electronic journals; 621.38152
• DOI: 10.1016/j.mssp.2020.105527
• Languages: English
• ISSNs: 1369-8001

Abstract

Abstract: This letter reports on the improvement of a SiO2 layer formed by atomic layer deposition on 4H-SiC, using a post-deposition anneal in forming gas ambient. Capacitance–voltage measurements revealed good electrical properties, compared to a thermal oxide which was grown in N 2 O, with flatband voltage values averaging at -0.29 V and a low positive mobile ion charge density in the order of 10 10 cm −2 . XPS analysis revealed the FG annealed sample to have the most Si rich interface comparatively to other PDAs, with a C:Si ratio of 0.72, allowing more Si bonds to be terminated. SIMS analysis identified an increase in hydrogen near the interface of the FG-annealed sample with a peak concentration of 2.12 × 10 21 cm −3 . It is concluded that the improvement in electrical performance is due to the hydrogen passivating trap states at the SiO2 /4H-SiC interface.