Cite
MLA Citation
Jianfeng Jiang et al.. “Low Lattice Mismatch InSe–Se Vertical Van der Waals Heterostructure for High‐performance Transistors via Strong Fermi‐Level Depinning (Small Methods 8/2020).” Small methods, vol. 4, no. 8, 2020, p. n/a. http://access.bl.uk/ark:/81055/vdc_100106635322.0x000005