Low Lattice Mismatch InSe–Se Vertical Van der Waals Heterostructure for High‐performance Transistors via Strong Fermi‐Level Depinning (Small Methods 8/2020). Issue 8 (13th August 2020)

• Record Type: Journal Article
• Authors: Jiang, Jianfeng; Meng, Fanqi; Cheng, Qilin; Wang, Aizhu; Chen, Yuke; Qiao, Jie; Pang, Jinbo; Xu, Weidong; Ji, Hao; Zhang, Yu; Zhang, Qinghua; Wang, Shanpeng; Feng, Xianjin; Gu, Lin; Liu, Hong; Han, Lin
• Is Part Of: Small methods. Volume 4:Issue 8(2020)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2020-08-13
• Subjects: contact engineering -- field‐effect transistors -- InSe -- van der Waals heterostructures; Nanotechnology -- Methodology -- Periodicals; Nanotechnology -- Periodicals; Periodicals; 620.5028
• DOI: 10.1002/smtd.202070032
• Languages: English
• ISSNs: 2366-9608

Abstract

Abstract : In article number 2000238, Hong Liu, Lin Han, and co‐workers present InSe‐Se vertical van der Waals (vdW) heterostructures to address a formidable contact engineering challenge, which have a low lattice mismatch of 1.1% and form 2D/2D low‐resistance vdW contacts, creating an InSe contact interface that substantially limits chemical disorder and Fermi‐level pinning.