Cite
APA Citation
Ishii, Y., Tanaka, M., Yabuuchi, M., Sawada, Y., Tanaka, S., Nii, K., Lu, T. Y., Huang, C. H., Chen, S. S., Kuo, Y. T., Lung, C. C., & Cheng, O. (n.d.). a highly symmetrical 10 transistor 2-read/write dual-port static random access memory bitcell design in 28 nm high-k/metal-gate planar bulk CMOS technology. Japanese journal of applied physics, 57, . http://access.bl.uk/ark:/81055/vdc_100087639417.0x000061