Multi-port dynamic compact thermal models of dual-chip package using model order reduction and metaheuristic optimization. (August 2018)

• Record Type: Journal Article
• Authors: Rogié, Brice; Codecasa, Lorenzo; Monier-Vinard, Eric; Bissuel, Valentin; Laraqi, Najib; Daniel, Olivier; D'Amore, Dario; Magnani, Alessandro; d'Alessandro, Vincenzo; Rinaldi, Niccolò
• Is Part Of: Microelectronics and reliability. Volume 87(2018)
• Page Start: 222
• Page End: 231
• Publication Date: 2018-08
• Subjects: Electronic apparatus and appliances -- Reliability -- Periodicals; Miniature electronic equipment -- Periodicals; Appareils électroniques -- Fiabilité -- Périodiques; Équipement électronique miniaturisé -- Périodiques; Electronic apparatus and appliances -- Reliability; Miniature electronic equipment; Periodicals; 621.3815
• DOI: 10.1016/j.microrel.2018.06.009
• Languages: English
• ISSNs: 0026-2714

Abstract

Abstract: Delphi-like boundary condition independent (BCI) compact thermal models (CTMs) are the standard for modelling single die packages. However their extraction, particularly in the transient case, will be time consuming due to complex numerical simulations for a large number of external conditions. Lately, new approaches to extract a BCI dynamical CTM (DCTM), based on model order reduction (MOR) were developed. Despite the numerous advantages of this recent method, the lack of numerical tools to integrate reduced-order models (ROM) makes it difficult to use at board level. In this study, a novel process flow for extracting Delphi-inspired BCI DCTMs is proposed. Thus a detailed three-dimensional model is replaced by a BCI-ROM model using FANTASTIC matrix reduction code to generate the data used in the creation of a Delphi-style BCI DCTM. That hybrid reduction method has been applied, at first on a single-chip package (QFN16) then on a dual-chip package (DFN12). Their derived CTM and DCTM have been compared in term of accuracy and creation time using, or not, MOR reduction technique. The results show that for a similar accuracy, the integration of MOR technique allows minimizing the time-consuming numerical simulations and consequently reduce the thermal network creation time by 80%. Highlights: Creation of multi-port Dynamical Compact Thermal Models (DCTMs) using Delphi-inspired methodology. Substitution of Detailed Thermal Model in DCTM building flow by a Reduced Order Model to lower the overall creation time. DCTM creation time is shortened of 80% for a single-chip package, and 90% for a dual-chip package, with similar accuracy. Thermal resistance and thermal capacitance's values of the DCTM obtained with stochastic Genetic Algorithms.