Cite
MLA Citation
Redwan N. Sajjad et al.. “A tunnel FET compact model including non-idealities with verilog implementation.” Solid-state electronics, vol. 150, 2018, pp. 16–22. http://access.bl.uk/ark:/81055/vdc_100071726014.0x00005a
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Redwan N. Sajjad et al.. “A tunnel FET compact model including non-idealities with verilog implementation.” Solid-state electronics, vol. 150, 2018, pp. 16–22. http://access.bl.uk/ark:/81055/vdc_100071726014.0x00005a