Cite
HARVARD Citation
Sajjad, R. et al. (2018). A tunnel FET compact model including non-idealities with verilog implementation. Solid-state electronics. pp. 16-22. [Online].
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Sajjad, R. et al. (2018). A tunnel FET compact model including non-idealities with verilog implementation. Solid-state electronics. pp. 16-22. [Online].