Gate-induced drain leakage current characteristics of p-type polycrystalline silicon thin film transistors aged by off-state stress. (October 2018)
- Record Type:
- Journal Article
- Title:
- Gate-induced drain leakage current characteristics of p-type polycrystalline silicon thin film transistors aged by off-state stress. (October 2018)
- Main Title:
- Gate-induced drain leakage current characteristics of p-type polycrystalline silicon thin film transistors aged by off-state stress
- Authors:
- Park, J.
Jang, K.S.
Shin, D.G.
Shin, M.
Yi, J.S. - Abstract:
- Highlights: Off-state bias stress is investigated for p-type poly-Si TFTs. Experimental and quantitative study is performed for off-state stress effects. GIDL current of poly-Si TFT can be successfully reduced by off-state bias stress. TCAD simulations are performed to understand the mechanisms of off-state bias stress. Local defect creation and charge trapping are key factors of GIDL current reduction. Abstract: Thin film transistors have become crucial components of several electronic display devices. However, high leakage current is a frustrating impediment to increasing the efficiency of these transistors. We have performed an experimental and quantitative study on the effects of off-state bias stress on the characteristics of a p-type polycrystalline silicon (poly-Si) thin film transistor (TFT). The gate-induced drain leakage (GIDL) current under off-state bias stress conditions was investigated by changing gate-source voltage ( V gs ) and drain-source voltage ( Vds ). Off-state bias stress was found to dramatically increase the threshold V gs from 1 to 11 V, thereby increasing the voltage needed to turn off the TFT, without causing significant changes in on-state current or subthreshold swing. We developed local defect creation and charge trapping models for a technology computer-aided design simulation platform to understand the mechanisms underlying these observed effects. Using the model, we showed that off-state stress induces charge trapping within the localHighlights: Off-state bias stress is investigated for p-type poly-Si TFTs. Experimental and quantitative study is performed for off-state stress effects. GIDL current of poly-Si TFT can be successfully reduced by off-state bias stress. TCAD simulations are performed to understand the mechanisms of off-state bias stress. Local defect creation and charge trapping are key factors of GIDL current reduction. Abstract: Thin film transistors have become crucial components of several electronic display devices. However, high leakage current is a frustrating impediment to increasing the efficiency of these transistors. We have performed an experimental and quantitative study on the effects of off-state bias stress on the characteristics of a p-type polycrystalline silicon (poly-Si) thin film transistor (TFT). The gate-induced drain leakage (GIDL) current under off-state bias stress conditions was investigated by changing gate-source voltage ( V gs ) and drain-source voltage ( Vds ). Off-state bias stress was found to dramatically increase the threshold V gs from 1 to 11 V, thereby increasing the voltage needed to turn off the TFT, without causing significant changes in on-state current or subthreshold swing. We developed local defect creation and charge trapping models for a technology computer-aided design simulation platform to understand the mechanisms underlying these observed effects. Using the model, we showed that off-state stress induces charge trapping within the local defects of a high electric field region in the TFT channel near the drain. This reduces the electric field and thermionic field-emission current, which in turn lowers the GIDL current by increasing threshold voltage V gs . … (more)
- Is Part Of:
- Solid-state electronics. Volume 148(2018)
- Journal:
- Solid-state electronics
- Issue:
- Volume 148(2018)
- Issue Display:
- Volume 148, Issue 2018 (2018)
- Year:
- 2018
- Volume:
- 148
- Issue:
- 2018
- Issue Sort Value:
- 2018-0148-2018-0000
- Page Start:
- 20
- Page End:
- 26
- Publication Date:
- 2018-10
- Subjects:
- Gate-induced drain leakage -- Off-state stress -- Charge trapping -- Defect creation -- Polycrystalline silicon thin-film transistor
Semiconductors -- Periodicals
Semiconducteurs -- Périodiques
621.38152 - Journal URLs:
- http://www.sciencedirect.com/science/journal/00381101 ↗
http://www.elsevier.com/journals ↗ - DOI:
- 10.1016/j.sse.2018.07.009 ↗
- Languages:
- English
- ISSNs:
- 0038-1101
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 8327.385000
British Library DSC - BLDSS-3PM
British Library HMNTS - ELD Digital store - Ingest File:
- 7174.xml