Demonstration of higher electron mobility in Si nanowire MOSFETs by increasing the strain beyond 1.3%. (June 2015)

• Record Type: Journal Article
• Authors: Luong, G.V.; Knoll, L.; Blaeser, S.; Süess, M.J.; Sigg, H.; Schäfer, A.; Trellenkamp, S.; Bourdelle, K.K.; Buca, D.; Zhao, Q.T.; Mantl, S.
• Is Part Of: Solid-state electronics. Volume 108(2015)
• Page Start: 19
• Page End: 23
• Publication Date: 2015-06
• Subjects: Si nanowire MOSFETs -- Uniaxial tensile strain; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2014.12.015
• Languages: English
• ISSNs: 0038-1101

Abstract

Abstract: In this work we demonstrate the benefit of high uniaxial tensile strain on the performances of Si nanowire (NW) MOSFETs. High uniaxial tensile strained Si NWs were realized by exploiting a "bridge technology" based on patterning of an initial biaxial tensile strained Si on insulator (sSOI) into thin NWs with large pads. Strain relaxation on the large pads amplifiers the strain in the NWs. Strained Si NW-arrays along 〈1 1 0〉/(1 0 0) direction with tensile strain values up to 2.2% were achieved. We have fabricated n-type Si NW-array MOSFETs with HfO2 /TiN gate stack and NiSi2 source/drain contacts. An increase of I on current by a factor of 1.35 was observed then the uniaxial strain was increased from 1.3% to 1.8% in NW MOSFETs. The enhanced device performance is primarily attributed to a higher electron mobility in the highly strained Si NWs.