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APA Citation
Chung, C., & Hou, C. (2017). an all-digital delay-locked loop for 3-D ICs die-to-die clock deskew applications. Microelectronics journal, 70, 63–71. http://access.bl.uk/ark:/81055/vdc_100054090056.0x000063
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Chung, C., & Hou, C. (2017). an all-digital delay-locked loop for 3-D ICs die-to-die clock deskew applications. Microelectronics journal, 70, 63–71. http://access.bl.uk/ark:/81055/vdc_100054090056.0x000063