Cite
MLA Citation
Changliang Qin et al.. “Process optimizations to recessed e-SiGe source/drain for performance enhancement in 22 nm all-last high-k/metal-gate pMOSFETs.” Solid-state electronics, vol. 123, 2016, pp. 38–43. http://access.bl.uk/ark:/81055/vdc_100034090904.0x000020