A 2-D analytical threshold-voltage model for GeOI/GeON MOSFET with high-k gate dielectric. (February 2016)

• Record Type: Journal Article
• Authors: Ji, Feng; Xu, J.P.; Liu, L.; Tang, W.M.; Lai, P.T.
• Is Part Of: Microelectronics and reliability. Volume 57(2016)
• Page Start: 24
• Page End: 33
• Publication Date: 2016-02
• Subjects: GeOI/GeON MOSFETs -- Threshold voltage -- Ultra-thin-body -- High-k gate dielectric; Electronic apparatus and appliances -- Reliability -- Periodicals; Miniature electronic equipment -- Periodicals; Appareils électroniques -- Fiabilité -- Périodiques; Équipement électronique miniaturisé -- Périodiques; Electronic apparatus and appliances -- Reliability; Miniature electronic equipment; Periodicals; 621.3815
• DOI: 10.1016/j.microrel.2015.12.004
• Languages: English
• ISSNs: 0026-2714

Abstract

Abstract: A 2-D analytical threshold-voltage model for ultra-thin-body MOSFET with buried insulator and high-k gate dielectric is established by solving the 2-D Poisson's equation for the gate-dielectric, channel and buried-insulator regions. The validity of the model is confirmed by comparing with experimental data and other models. Using the model, the influences of gate-dielectric permittivity, buried-insulator permittivity, channel thickness, buried-insulator thickness and channel doping concentration on threshold behaviors are investigated. It is found that the threshold behaviors can be improved by using buried insulator with low permittivity, thin channel and high channel doping concentration. However, the threshold performance would be degraded when high-k gate dielectric is used due to enhanced fringing-field effect. Highlights: A threshold voltage model for GeOI/GeON MOSFET is built in good agreement with the experimental data and other models. A good trade-off among the MOSFET characteristics can be obtained using the model. Effects of device parameters on threshold voltage degradation are discussed in detail.