Low frequency noise variability in ultra scaled FD-SOI n-MOSFETs: Dependence on gate bias, frequency and temperature. (March 2016)

• Record Type: Journal Article
• Authors: Theodorou, C.G.; Ioannidis, E.G.; Haendler, S.; Josse, E.; Dimitriadis, C.A.; Ghibaudo, G.
• Is Part Of: Solid-state electronics. Volume 117(2016)
• Page Start: 88
• Page End: 93
• Publication Date: 2016-03
• Subjects: Low-frequency noise -- Noise variability -- RTN -- FD-SOI MOSFETs; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2015.11.011
• Languages: English
• ISSNs: 0038-1101

Abstract

Abstract: In this paper, a parametric statistical analysis of the low-frequency noise (LFN) in very small area ( W · L ≈ 10 −3 μm 2 ) 14 nm fully depleted silicon-on-insulator (FD-SOI) n-MOS devices is presented. It has been demonstrated that the LFN origin is due to carrier trapping/detrapping into gate dielectric traps near the interface and the mean noise level in such small area MOSFETs is well approached by the carrier number fluctuations model in all measurement conditions. The impact of gate voltage bias and temperature on the LFN variability, as well as the standard deviation dependence on frequency have been studied for the first time, focusing on their relation to the Random Telegraph Noise (RTN) effect and its characteristics.