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APA Citation
Taraate, V. (2016). Digital logic design using Verilog : coding and RTL synthesis. New Delhi : Springer. http://access.bl.uk/ark:/81055/vdc_100078242789.0x000001
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Taraate, V. (2016). Digital logic design using Verilog : coding and RTL synthesis. New Delhi : Springer. http://access.bl.uk/ark:/81055/vdc_100078242789.0x000001