Digital logic design using Verilog : coding and RTL synthesis /: coding and RTL synthesis. (2016)
- Record Type:
- Book
- Title:
- Digital logic design using Verilog : coding and RTL synthesis /: coding and RTL synthesis. (2016)
- Main Title:
- Digital logic design using Verilog : coding and RTL synthesis
- Further Information:
- Note: Vaibbhav Taraate.
- Authors:
- Taraate, Vaibbhav
- Contents:
- Introduction.- Combinational Logic Design (Part I).- Combinational Logic Design (Part II).- Combinational Design Guidelines.- Sequential Logic Design.- Sequential Design Guidelines.- Complex Designs using Verilog RTL.- Finite State Machines.- Simulation Concepts and PLD Based Designs.- RTL Synthesis.- Static Timing Analysis (STA).- Constraining Design.- Multiple Clock Domain Designs.- Low Power Design.- RTL Design for SOCs.
- Publisher Details:
- New Delhi : Springer
- Publication Date:
- 2016
- Copyright Date:
- 2016
- Extent:
- 1 online resource (416 pages)
- Subjects:
- 621.395
Logic design -- Computer programs
Verilog (Computer hardware description language)
Digital electronics -- Design - Languages:
- English
- ISBNs:
- 9788132227915
- Related ISBNs:
- 9788132227892
- Access Rights:
- Legal Deposit; Only available on premises controlled by the deposit library and to one user at any one time; The Legal Deposit Libraries (Non-Print Works) Regulations (UK).
- Access Usage:
- Restricted: Printing from this resource is governed by The Legal Deposit Libraries (Non-Print Works) Regulations (UK) and UK copyright law currently in force.
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library HMNTS - ELD.DS.403586
- Ingest File:
- 02_449.xml