1. Detail specification for low power silicon n-p-n switching transistors. 20 V, planar epitaxial, ambient rated, hermetic encapsulation (long lead version). Full plus additional assessment level. (15th July 1978) Authors: British Standards Institution, Record Type: Book Extent: 1 online resource (6 pages) View Content: Available online (eLD content is only available in our Reading Rooms) ↗
2. Detail specification for low power silicon n-p-n switching transistors. 65 V, planar epitaxial, ambient rated, hermetic encapsulation (long lead version). Full plus additional assessment level. (15th January 1979) Authors: British Standards Institution, Record Type: Book Extent: 1 online resource (6 pages) View Content: Available online (eLD content is only available in our Reading Rooms) ↗
3. Detail specification for low power silicon p-n-p switching transistors. 65 V, planar epitaxial, ambient rated, hermetic encapsulation (long lead version). Full plus additional assessment level. (15th July 1978) Authors: British Standards Institution, Record Type: Book Extent: 1 online resource (6 pages) View Content: Available online (eLD content is only available in our Reading Rooms) ↗