Detail specification for low power silicon n-p-n switching transistors. 65 V, planar epitaxial, ambient rated, hermetic encapsulation (long lead version). Full plus additional assessment level. (15th January 1979)

Record Type:
Book
Title:
Detail specification for low power silicon n-p-n switching transistors. 65 V, planar epitaxial, ambient rated, hermetic encapsulation (long lead version). Full plus additional assessment level. (15th January 1979)
Main Title:
Detail specification for low power silicon n-p-n switching transistors. 65 V, planar epitaxial, ambient rated, hermetic encapsulation (long lead version). Full plus additional assessment level.
Authors:
British Standards Institution,
Publisher Details:
London : British Standards Institution
Publication Date:
1979
Extent:
1 online resource (6 pages)
Subjects:
602.1841
Approval testing
Bipolar transistors
Electronic equipment and components
Quality assurance systems
Transistors
Rated voltage
Switches
Assessed quality
Epitaxial layers
Inspection
Qualification approval
Dimensions
Semiconductor devices
Switching circuits
Design
Languages:
English
Related ISBNs:
0580107000
ISSNs:
0015-0107
Access Rights:
Legal Deposit; Only available on premises controlled by the deposit library and to one user at any one time; The Legal Deposit Libraries (Non-Print Works) Regulations (UK).
Access Usage:
Restricted: Printing from this resource is governed by The Legal Deposit Libraries (Non-Print Works) Regulations (UK) and UK copyright law currently in force.
View Content:
Available online (eLD content is only available in our Reading Rooms) ↗
Physical Locations:
British Library HMNTS - ELD.DS.524234
Ingest File:
03_116.xml