1. 3D Network-on-Chip Architectures Using Homogeneous Meshes and Heterogeneous Floorplans. (31st August 2010) Authors: de Paulo, Vitor; Ababei, Cristinel Other Names: Torres Lionel Academic Editor. Journal: International journal of reconfigurable computing Issue: Volume 2010(2010) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
2. 3D Network-on-Chip Architectures Using Homogeneous Meshes and Heterogeneous Floorplans. (31st August 2010) Authors: de Paulo, Vitor; Ababei, Cristinel Other Names: Torres Lionel Academic Editor. Journal: International journal of reconfigurable computing Issue: Volume 2010(2010) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
3. A Decimal Floating-Point Accurate Scalar Product Unit with a Parallel Fixed-Point Multiplier on a Virtex-5 FPGA. (1st December 2010) Authors: Baesler, Malte; Voigt, Sven-Ole; Teufel, Thomas Other Names: Prasanna Viktor K. Academic Editor. Journal: International journal of reconfigurable computing Issue: Volume 2010(2010) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
4. A Genetic Programming Approach to Reconfigure a Morphological Image Processing Architecture. (21st September 2010) Authors: Pedrino, Emerson Carlos; Saito, José Hiroki; Roda, Valentin Obac Other Names: Todorovich Elías Academic Editor. Journal: International journal of reconfigurable computing Issue: Volume 2011(2011) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
5. A High-Throughput Hardware Architecture for the H.264/AVC Half-Pixel Motion Estimation Targeting High-Definition Videos. (28th October 2010) Authors: Corrêa, Marcel M.; Schoenknecht, Mateus T.; Dornelles, Robson S.; Agostini, Luciano V. Other Names: Sutter Gustavo Academic Editor. Journal: International journal of reconfigurable computing Issue: Volume 2011(2011) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
6. A Workload-Adaptive and Reconfigurable Bus Architecture for Multicore Processors. (15th June 2010) Authors: Akram, Shoaib; Papakonstantinou, Alexandros; Kumar, Rakesh; Chen, Deming Other Names: Platzner Marco Academic Editor. Journal: International journal of reconfigurable computing Issue: Volume 2010(2010) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
7. A Workload-Adaptive and Reconfigurable Bus Architecture for Multicore Processors. (15th June 2010) Authors: Akram, Shoaib; Papakonstantinou, Alexandros; Kumar, Rakesh; Chen, Deming Other Names: Platzner Marco Academic Editor. Journal: International journal of reconfigurable computing Issue: Volume 2010(2010) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
8. Design of a Reconfigurable Pulsed Quad-Cell for Cellular-Automata-Based Conformal Computing. (8th July 2010) Authors: Hoseini, Mariam; Tan, Zhou; You, Chao; Pavicic, Mark Other Names: Chow Paul Academic Editor. Journal: International journal of reconfigurable computing Issue: Volume 2010(2010) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
9. Design of a Reconfigurable Pulsed Quad-Cell for Cellular-Automata-Based Conformal Computing. (8th July 2010) Authors: Hoseini, Mariam; Tan, Zhou; You, Chao; Pavicic, Mark Other Names: Chow Paul Academic Editor. Journal: International journal of reconfigurable computing Issue: Volume 2010(2010) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
10. Exploiting Dual-Output Programmable Blocks to Balance Secure Dual-Rail Logics. (12th October 2010) Authors: Sauvage, Laurent; Nassar, Maxime; Guilley, Sylvain; Flament, Florent; Danger, Jean-Luc; Mathieu, Yves Other Names: Torres Lionel Academic Editor. Journal: International journal of reconfigurable computing Issue: Volume 2010(2010) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗