1. (Invited) Gate-All-Around Transistors Based on Vertically Stacked Si Nanowires. (26th April 2017) Authors: Mertens, Hans; Ritzenthaler, Romain; Hikavyy, Andriy Yakovitch; Kim, Min-Soo; Tao, Zheng; Wostyn, Kurt; Schram, Tom; Kunnen, Eddy; Ragnarsson, Lars-Åke; Dekkers, Harold F. W.; Hopf, Toby; Devriendt, Katia; Tsvetanova, Diana; Chew, Soon Aik; Kikuchi, Yoshiaki; Van Besien, Els; Rosseel, Erik; Manna... Journal: ECS transactions Issue: Volume 77:Number 5(2017) Page Start: 19 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
2. (Invited) Si-Cap-Free Low-DIT SiGe Gate Stack for High-Performance pFETs. (8th September 2020) Authors: Arimura, Hiroaki; Wostyn, Kurt; Ragnarsson, Lars-Åke; Conard, Thierry; Chasin, Adrian; Franco, Jacopo; Mitard, Jerome; Horiguchi, Naoto Journal: ECS transactions Issue: Volume 98:Number 5(2020) Page Start: 377 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
3. Study of SiGe Surface Cleaning. (15th August 2017) Authors: Komori, Kana; Wostyn, Kurt; Rondas, Dirk; Prado, Jana Loya; Conard, Thierry; Loo, Roger; Ragnarsson, Lars-Åke; Horiguchi, Naoto; Holsteyns, Frank Journal: ECS transactions Issue: Volume 80:Number 2(2017) Page Start: 141 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
4. The Impact of Dummy Gate Processing on Si-Cap-Free SiGe Passivation: A Physical Characterization Study on Strained SiGe 25% and 45%. (15th August 2017) Authors: Wostyn, Kurt; Ragnarsson, Lars-Åke; Schram, Tom; Witters, Liesbeth; Conard, Thierry; Douhard, Bastien; Vanhaeren, Danielle; Holsteyns, Frank; Vandervorst, Wilfried; Horiguchi, Naoto Journal: ECS transactions Issue: Volume 80:Number 2(2017) Page Start: 155 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗