1. A novel BIST for monitoring aging/temperature by self-triggered scheme to improve the reliability of STT-MRAM. (November 2020) Authors: Zhou, Y.; Cai, H.; Zhang, M.; Naviner, L.A.B.; Yang, J. Journal: Microelectronics and reliability Issue: Volume 114(2020) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
2. A process-variation-resilient methodology of circuit design by using asymmetrical forward body bias in 28 nm FDSOI. (September 2016) Authors: Wang, Y.; Cai, H.; Naviner, L.A.B.; Zhao, X.X.; Zhang, Y.; Slimani, M.; Klein, J.O.; Zhao, W.S. Journal: Microelectronics and reliability Issue: Volume 64(2016) Page Start: 26 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
3. A process-variation-resilient methodology of circuit design by using asymmetrical forward body bias in 28 nm FDSOI. (September 2016) Authors: Wang, Y.; Cai, H.; Naviner, L.A.B.; Zhao, X.X.; Zhang, Y.; Slimani, M.; Klein, J.O.; Zhao, W.S. Journal: Microelectronics and reliability Issue: Volume 64(2016) Page Start: 26 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
4. Compact thermal modeling of spin transfer torque magnetic tunnel junction. Issue 9 (August 2015) Authors: Wang, Y.; Cai, H.; Naviner, L.A.B.; Zhang, Y.; Klein, J.O.; Zhao, W.S. Journal: Microelectronics and reliability Issue: Volume 55:Issue 9/10(2015) Page Start: 1649 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
5. CSME: A novel cycle-sensing margin enhancement scheme for high yield STT-MRAM. (November 2020) Authors: Cai, H.; Liu, M.; Zhou, Y.; Liu, B.; Naviner, L.A.B. Journal: Microelectronics and reliability Issue: Volume 114(2020) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
6. Reliable majority voter based on spin transfer torque magnetic tunnel junction device. Issue 1 (1st January 2016) Authors: Butzen, P.F.; Slimani, M.; Wang, Y.; Cai, H.; Naviner, L.A.B. Journal: Electronics letters Issue: Volume 52:Issue 1(2016) Page Start: 47 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
7. Single-event transient effects on dynamic comparator in 28 nm FDSOI CMOS technology. (September 2018) Authors: Maciel, N.; Marques, E.C.; Naviner, L.A.B.; Cai, H. Journal: Microelectronics and reliability Issue: Volume 88/90(2018) Page Start: 965 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
8. Ultra wide voltage range consideration of reliability-aware STT magnetic flip-flop in 28 nm FDSOI technology. Issue 9 (August 2015) Authors: Cai, H.; Wang, Y.; Naviner, L.A.B.; Zhao, W.S. Journal: Microelectronics and reliability Issue: Volume 55:Issue 9/10(2015) Page Start: 1323 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗