Modeling of SiC transistor with counter-doped channel. (February 2023)

• Record Type: Journal Article
• Authors: Vyas, Pratik B.; Pal, Ashish; Weeks, Stephen; Holt, Joshua; Srivastava, Aseem K.; Megalini, Ludovico; Krishnan, Siddarth; Chudzik, Michael; Bazizi, El Mehdi; Ayyagari-Sangamalli, Buvna
• Is Part Of: Solid-state electronics. Volume 200(2023)
• Publication Date: 2023-02
• Subjects: Silicon carbide -- SiC -- Counter doping -- Mobility -- Dit -- Interface traps -- Surface roughness; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2022.108548
• Languages: English
• ISSNs: 0038-1101

Abstract

Abstract: In this paper, we present a modeling framework to simulate the electrical characteristics of SiC MOSFET. Our model also describes the mobility improvement with counter doping in channel. Our analyses show improved drive current and degraded/lower threshold voltage with a counter-doped channel. To this end, we investigate the impact of varying the doping concentrations of the counter-doped region and the underlying p-well for optimum device performance. Highlights: TCAD model to accurately simulate SiC transistor behavior with interface D it and counter-doped channel. Counter-doping in SiC channel leads to drive current and mobility improvement at the expense of V T loss. Buried channel formation due to partial depletion of counter-doped channel can lead to loss of gate control. Optimum drive current improvement for acceptable V T loss can be achieved by varying counter-doping concentration.