Negative capacitance gate-all-around PZT silicon nanowire with high-K/metal gate MFIS structure for low SS and high Ion/Ioff. (1st May 2023)

• Record Type: Journal Article
• Authors: Kumar, Vivek; Maurya, Ravindra Kumar; Malvika, ; Rawat, Gopal; Mummaneni, Kavicharan
• Is Part Of: Semiconductor science and technology. Volume 38:Number 5(2023)
• Publication Date: 2023-05-01
• Subjects: gate-all-around FET -- ferroelectricity -- MFIS -- steep subthreshold swing -- transconductance; Semiconductors -- Periodicals; 621.38152
• DOI: 10.1088/1361-6641/acc6e7
• Languages: English
• ISSNs: 0268-1242

Abstract

Abstract: In the present work, a high- k dielectric hafnium dioxide and lead zirconate titanate (PZT) have been incorporated as a ferroelectric (FE) layer in the gate stack. The Ion /Ioff ratio obtained of the order of 10 13, and the subthreshold swing 49.7 mV dec −1 are the most captivating findings of the device which outshines earlier findings. There is a significant improvement in the on-state current ( I on ) and off-state current ( I off ). Furthermore, comparatively high value of transconductance ( g m ) and transconductance generation factor ( g m / I d ), due to the incorporation of 20 nm PZT NC FE layer, insinuates that the device could be used in low power applications. These enticing findings of the proposed PZT GAA-NCFET nanowire could pave the way for low power devices.