Cite
APA Citation
Liao, J., Ko, Z., Lin, H., Hsieh, J., Yang, L., Yang, T., Chen, K., & Lu, C. (2023). pMOS junction optimization for 3D NAND FLASH memory with CMOS under array. Solid-state electronics, 202, . http://access.bl.uk/ark:/81055/vdc_100179841517.0x000058