(Invited) Enabling Hetero-Integration of III-V and Ge-Based Transistors on Silicon with Ultra-Thin Buffers Formed by Interfacial Misfit Technique. (18th August 2016)

• Record Type: Journal Article
• Authors: Gong, Xiao; Yadav, Sachin; Goh, Kian Hui; Tan, Kian Hua; Kumar, Annie; Low, Kian Lu; Jia, Bowen; Yoon, Soon-Fatt; Liang, Gengchiau; Yeo, Yee-Chia
• Is Part Of: ECS transactions. Volume 75:Number 8(2016)
• Page Start: 421
• Page End: 437
• Publication Date: 2016-08-18
• Subjects: Electrochemistry -- Periodicals; Electrochemistry; Periodicals; Electronic journals; Electronic journal; 541.37
• DOI: 10.1149/07508.0421ecst
• Languages: English
• ISSNs: 1938-5862

Abstract

Abstract : In this paper, we discuss the application of the interfacial misfit (IMF) technique to enable the heterogeneous integration of III-V and Ge-based transistors on Si substrates. Ge pFETs and InAs nFETs were co-integrated on a Si substrate using common contact formation, digital etch, and gate stack formation modules. In addition, vertically stacked nanowire (NW) GaSb pFETs and InAs nFETs on Si substrates were also realized.