TCAD-based design and verification of the components of a 200 V GaN-IC platform. (February 2023)

• Record Type: Journal Article
• Authors: Vudumula, Pavan; Cosnier, Thibault; Syshchyk, Olga; Bakeroot, Benoit; Decoutere, Stefaan
• Is Part Of: Solid-state electronics. Volume 200(2023)
• Publication Date: 2023-02
• Subjects: E-mode p-GaN HEMT -- D-mode MIS HEMT -- GET SBD -- GaN IC -- Sentaurus TCAD; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2022.108496
• Languages: English
• ISSNs: 0038-1101

Abstract

Abstract: This paper describes the TCAD-based design and verification of the different components of a 200 V GaN-on-SOI integrated circuits (ICs) platform developed on 200 mm substrates. This platform comprises of depletion-mode (d-mode) MIS-HEMTs, and Gated-Edge-Termination Schottky barrier diodes (GET-SBDs) monolithically integrated in an enhancement-mode (e-mode) HEMT technology baseline. A variety of low-voltage analog/logic devices and passive components further supports the GaN ICs platform. Device simulations have been verified using measured low voltage test structures. Verification of simulations with the measurements results in calibration of sheet resistance (Rsh ) in the gate and access region, threshold voltage (Vth ), drain current (Ids ), ON-resistance (RON ), gate current (Ig ) for HEMT structures, and turn-on voltage (VT ) and forward voltage drop (VF ) for GET-SBD structure. Highlights: TCAD-based design and verification of different components on 200 V GaN IC platform D-mode MIS-HEMT and GET-SBD are monolithically integrated with an e-mode technology TCAD calibration flow for the Schottky diodes and d-mode HEMTs along with pGaN HEMTs Optimize GaN-IC technology by calibrating the lateral co-integrated GaN power devices Overlays of simulated and measured results for TCAD-based model verification