Surrogate models for device design using sample-efficient Deep Learning. (January 2023)

• Record Type: Journal Article
• Authors: Patel, Rutu; Mohapatra, Nihar R.; Hegde, Ravi S.
• Is Part Of: Solid-state electronics. Volume 199(2023)
• Publication Date: 2023-01
• Subjects: Deep Neural Networks -- Active learning -- LDMOSFET -- Off-state breakdown voltage -- Specific on resistance; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2022.108505
• Languages: English
• ISSNs: 0038-1101

Abstract

Abstract: Generation of training dataset for machine learning-based device design algorithm is expensive. To address this, we propose an active learning approach. Its efficiency is demonstrated through a Deep Neural Network (DNN) based Laterally Diffused Metal Oxide Semiconductor Field-effect Transistor (LDMOSFET) off-state breakdown voltage (BVDS, off ) and specific on-resistance (Rsp ) predictor. Our results show the possibility of ∼ 50% reduction in the training dataset size without compromising the baseline accuracy. Specifically, we compared eight sampling techniques and found that Informative-Query by Committee (I-QBC) and Diverse Informative-Greedy Sampling (DI-GS) techniques work best with ∼ 1 . 87 % Euclidean Norm of Prediction Error (ENPE). Highlights: Training dataset generation for machine learning-based device design is expensive Active learning is used to develop a DNN-based LDMOSFET BVDS, off and Rsp predictor. Training dataset size reduces by 50% without compromising the baseline accuracy. Eight techniques for efficient sampling are proposed.