A low-power high-quality CMOS image sensor using 1.5 V 4T pinned photodiode and dual-CDS column-parallel single-slope ADC. (1st August 2022)

• Record Type: Journal Article
• Authors: Xu, Wenjing; Chen, Jie; Kuang, Zhangqu; Zhou, Li; Chen, Ming; Zhang, Chengbin
• Is Part Of: Journal of semiconductors. Volume 43:Number 8(2022)
• Publication Date: 2022-08-01
• Subjects: CMOS image sensor -- 4T pinned photodiode -- single-slope ADC -- correlated double sample -- counting method; Semiconductors -- Periodicals; 621.38152
• DOI: 10.1088/1674-4926/43/8/082401
• Languages: English
• ISSNs: 1674-4926

Abstract

Abstract: This paper presents a low-power high-quality CMOS image sensor (CIS) using 1.5 V 4T pinned photodiode (4T-PPD) and dual correlated double sampling (dual-CDS) column-parallel single-slope ADC. A five-finger shaped pixel layer is proposed to solve image lag caused by low-voltage 4T-PPD. Dual-CDS is used to reduce random noise and the nonuniformity between columns. Dual-mode counting method is proposed to improve circuit robustness. A prototype sensor was fabricated using a 0.11 µ m CMOS process. Measurement results show that the lag of the five-finger shaped pixel is reduced by 80% compared with the conventional rectangular pixel, the chip power consumption is only 36 mW, the dynamic range is 67.3 dB, the random noise is only 1.55 e – rms, and the figure-of-merit is only 1.98 e – ·nJ, thus realizing low-power and high-quality imaging.