Cite
HARVARD Citation
John, V. et al. (2020). Design of a power-efficient Kogge–Stone adder by exploring new OR gate in 45nm CMOS process. Circuit world. 46 (4), pp. 257-269. [Online].
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John, V. et al. (2020). Design of a power-efficient Kogge–Stone adder by exploring new OR gate in 45nm CMOS process. Circuit world. 46 (4), pp. 257-269. [Online].