Modeling of SPAD avalanche breakdown probability and jitter tail with field lines. (August 2022)

• Record Type: Journal Article
• Authors: Helleboid, Rémi; Rideau, Denis; Grebot, Jeremy; Nicholson, Isobel; Moussy, Norbert; Saxod, Olivier; Saint-Martin, Jérôme; Pala, Marco; Dollfus, Philippe
• Is Part Of: Solid-state electronics. Volume 194(2022)
• Publication Date: 2022-08
• Subjects: Avalanche breakdown probability -- Breakdown voltage -- Jitter -- Photon detection efficiency (PDE) -- Single-photon avalanche diode (SPAD) -- Technology computer-aided design (TCAD); Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2022.108376
• Languages: English
• ISSNs: 0038-1101

Abstract

Highlights: It is critical to be able to test SPAD design improvements without having to wait for silicon production, which necessitates predictive modeling. A new methodology to accurately simulate the Photon Detection Efficiency and the Jitter tail of SPAD devices is presented. This method first relies on the use of the electric field lines to mimic the carriers' trajectories. The results obtained numerically are compared with an extensive series of measurements and show a good agreement on a wide variety of device designs. Abstract: A new methodology to accurately simulate the Photon Detection Efficiency and the Jitter tail of SPAD devices is presented. This method first relies on the use of the electric field lines to mimic the carriers' trajectories. A model for impact ionization and avalanche probability is then used on the obtained lines to simulate the probability of avalanche, coupled with the optical absorption, the PDE is then extracted. Finally, an advection–diffusion model is used to simulate the drift and diffusion of carriers within the device, which leads to the timing jitter due to the transport time from the photogeneration spot to the avalanche region. The results obtained numerically are compared with an extensive series of measurements and show a good agreement on a wide variety of device designs.