A Π-shaped p-GaN HEMT for reliable enhancement mode operation. (June 2022)

• Record Type: Journal Article
• Authors: Sehra, Khushwant; Kumari, Vandana; Gupta, Mridula; Mishra, Meena; Rawal, D.S.; Saxena, Manoj
• Is Part Of: Microelectronics and reliability. Volume 133(2022)
• Publication Date: 2022-06
• Subjects: HEMT -- p-GaN -- Drain lag -- Gate lag -- Current collapse -- Dispersive effects -- Slump ratio; Electronic apparatus and appliances -- Reliability -- Periodicals; Miniature electronic equipment -- Periodicals; Appareils électroniques -- Fiabilité -- Périodiques; Équipement électronique miniaturisé -- Périodiques; Electronic apparatus and appliances -- Reliability; Miniature electronic equipment; Periodicals; 621.3815
• DOI: 10.1016/j.microrel.2022.114544
• Languages: English
• ISSNs: 0026-2714

Abstract

Abstract: This paper presents a TCAD based investigation of virtually fabricated Π-shaped Gate p-GaN HEMT for reliable enhancement mode operation. A detailed comparison with the Conventional T-Gate counterpart, with a focus towards the trap related dispersive effect reveals the superiority of Π-shaped Gates P-GaN HEMT for suppressing both the vertical substrate and gate leakage currents, thereby enhancing the breakdown characteristics of the device. A modification of the electric fields, into a stepped profile, demonstrates effective suppression of the leakage through the surface defects, and spillover into GaN buffer, thereby mitigating the trap related dispersive effects. Dispersive effect of the two devices has also been compared using current Slump Ratio (SR) which is lower for Π-shaped Gate P-GaN HEMT. Further analysis into laterally scaled drain-access regions, demonstrates superiority of Π-shaped Gates in achieving a reliable thermal operation, and applicability of Π-shaped Gate P-GaN HEMT for future RF and High Power applications. Highlights: Π – Shaped Gate results in an improvement of reverse breakdown and thermal profile ensuring reliability for p - GaN devices. A parallel arrangement of MS Schottky diodes improves the current handling capacity of the p – GaN layer with a Π – Gate. Π – Gate limits the leakage of electrons through the surface defects and suppresses the trap related gate – lag phenomenon. Pulsed IV of Π - Gate reveals significantly suppressed trap – related dispersive effects for laterally scaled devices. Field modification due to Π – Gate limits hole deficiency in p - GaN layer and improves the threshold voltage instability.